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???The latter technique is more common and is referred to as cycle stealing, because the DMA module in effect steals a bus cycle Figure 7.7 Typical DMA Block Diagram When the processor wishes to read or write a block of data, it issues a command to the DMA module, by sending to the DMA module the following information:
Whether a read or write is requested, using the read or write control line between the processor and the DMA module.I/O controllers are commonly seen on microcomputers, whereas I/O channels are used on mainframe Figure 7.2 Block Diagram of an I/O Module 7.3 Programmed I/O
With programmed I/O, data are exchanged between the processor and the I/O module.Similarly, if the I/O device operates at a rate higher than the memory access rate, then the I/O module performs the needed buffering operation Finally, an I/O module is often responsible for error detection and for subsequently reporting errors to the processor.There are four types of I/O commands that an I/O module may receive when it is addressed by a processor:
o Control: Used to activate a peripheral and tell it what to do.
o Test: Used to test various status conditions associated with an I/O module and its peripherals.Typically, a buffer is associated with the transducer to temporarily hold data being transferred between the I/O module and the external environment KEYBOARD/MONITOR The basic unit of exchange here is the character : ?When the processor is executing a program and encounters an instruction relating to I/O, it executes that instruction by issuing a command to the appropriate I/O module.o Read: Causes the I/O module to obtain an item of data from the peripheral and place it in an internal buffer o Write: Causes the I/O module to take an item of data (byte or word) from the data bus and subsequently transmit that data item to the peripheral Figure 7.3a gives an example of the use of programmed I/O to read in a block of data from a peripheral device into memory.The minimum information required is (a) the status of the processor, which is contained in a register called the program status word (PSW); and (b) the location of the next instruction to be executed,
processor now loads the program counter with the entry location of the interrupt-handling program that will respond to this interrupt.As a result, the next instruction to be executed Figure 7.5 Figure 7.6 Changes in Memory and Registers for an Interrup 7.5 Direct Memory Access When large volumes of data are to be moved, a more efficient technique is required: direct memory access (DMA).The number of words to be read or written, again communicated via the data lines and stored in the data count register Figure 7.8 shows where in the instruction cycle the processor may be suspended.INPUT/OUTPUT 7.1 External Devices I/O operations are accomplished through a wide assortment of external devices that provide a means of exchanging data between the external environment and the computer.In a fixed-head disk, the transducer is capable of converting between the magnetic patterns on the moving disk surface and bits in the device's buffer (Figure 7.1).This system includes two basic components(which not only connects an I/O device with the system bus, but plays a very crucial role in between) :
i- ii- the I/O devices and
I/O module,.Command decoding: The I/O module accepts commands from the processor, typically sent as signals on the control bus.For example, an I/O module for a disk drive might accept the following commands: READ SECTOR, WRITE SECTOR, SEEK track number, and SCAN record ID. The latter two commands each include a parameter that is sent on the data bus.This communication involves commands, status information, and data ( An essential task of an I/O module is data buffering.An I/O module that takes on most of the detailed processing burden, presenting a high-level interface to the processor, is usually referred to as an I/O channel or I/O processor.To explain the programmed I/O technique, we view it first from the point of view of the I/O commands issued by the processor to the I/O module, and then from the point of view of the I/O instructions executed by the processor.I/O COMMANDS To execute an I/O-related instruction, the processor issues an address, specifying the particular I/O module and external device, and an I/O command.I/O INSTRUCTIONS With programmed I/O, there is a close correspondence between the I/O-related instructions that the processor fetches from memory and the I/O commands that the processor issues to an I/O module to execute the instructions.Because the address space for I/O is isolated from that for memory, this is referred to as isolated I/O memory-mapped I/O isolated I/O 7.4 Memory-Mapped and Isolated I/O 7.4 Interrupt-Driven I/O
The problem with programmed I/O is that the processor has to wait a long time for the I/O module of concern to be ready for either reception or transmission of data.When the interrupt from the I/O module occurs, the processor saves the context (e.g., program counter and processor registers) of the current program and processes the interrupt.The processor finishes execution of the current instruction before responding to the interrupt The processor tests for an interrupt, and sends an acknowledgment signal to the device that issued the interrupt.Control signals determine the function that the device will perform, such as send data to the I/O module (INPUT or READ), accept data from the I/O module (OUTPUT or WRITE), report status, or perform some control function particular to the device (e.g., position a disk head).Printable characters are the alphabetic, numeric, and special characters that can be printed on paper or displayed on a screen.On output, IRA code characters are transmitted to an external device from the I/O module.A moving-head disk must also be able to cause the disk arm to move radially in and out across the disk's surface 7.2 I/O MODULES The computer consists of an I/O (input- output) system.Functions of I/O Module: The major functions of an I/O module are:
Processor communication -- this involves the following tasks: ?When a byte is received, the I/O module checks the parity to determine whether an error has occurred 7.2.1 I/O module structure Figure 7.2 provides a general block diagram of an I/O module.The module must also be able to recognize and generate addresses associated with the devices it controls.An I/O module that is quite primitive and requires detailed control is usually referred to as an I/O controller or device controller.With programmed I/O, the I/O module will perform the requested action and then set the appropriate bits in the I/O status register .The I/O module takes no further action to alert the processor.The processor treats the status and data registers of I/O modules as memory locations and uses the same machine instructions to access both memory and I/O devices.In this case, a user program is interrupted after the instruction at location N. The contents of all of the registers plus the address of the next instruction are pushed onto the stack.When interrupt processing is complete, the saved register values are retrieved from the stack and restored to the registers (e.g., see Figure 7.6b).Figure 7.5 shows a typical sequence.????????3.?1.2.??2.3.?????????

لخص INPUT/OUTPUT
7.1 External Devices
I/O operations are accomplished through a wide assortment of external devices that provide a
means of exchanging data between the external environment and the computer. An external
device attaches to the computer by a link to an I/O module . The link is used to exchange control,
status, and data between the I/O module and the external device. In very general terms, the
nature of an external device is indicated in Figure 7.1. The interface to the I/O module is in the
form of control, data, and status signals.

 Control signals determine the function that the device will perform, such as send data to
the I/O module (INPUT or READ), accept data from the I/O module (OUTPUT or
WRITE), report status, or perform some control function particular to the device (e.g.,
position a disk head).

 Data are in the form of a set of bits to be sent to or received from the I/O module.

 Status signals indicate the state of the device. Examples are READY/NOT-READY to
show whether the device is ready for data transfer.

 The transducer converts data from electrical to other forms of energy during output and
from other forms to electrical during input.

 Typically, a buffer is associated with the transducer to temporarily hold data being
transferred between the I/O module and the external environment KEYBOARD/MONITOR The basic unit of exchange here is the character :
 Associated with each character is a code, typically 7 or 8 bits in length. The most
commonly used text code is the International Reference Alphabet (IRA). Thus, 128
different characters can be represented.

 Characters are of two types: printable and control:

 Printable characters are the alphabetic, numeric, and special characters that can be
printed on paper or displayed on a screen.

 Some of the control characters have to do with controlling the printing or displaying
of characters; an example is carriage return.
 For keyboard input, when the user depresses a key:

1. this generates an electronic signal that is interpreted by the transducer in the
   keyboard


2. and translated into the bit pattern of the corresponding IRA code.


3. This bit pattern is then transmitted to the I/O module in the computer.
    At the computer, the text can be stored in the same IRA code.


4. On output, IRA code characters are transmitted to an external device from the I/O
   module.


5. The transducer at the device interprets this code


6. and sends the required electronic signals to the output device DISK DRIVE A disk drive contains:
   
    electronics for exchanging data, control, and status signals with an I/O module
   
    plus the electronics for controlling the disk read/write mechanism.
   
    In a fixed-head disk, the transducer is capable of converting between the magnetic patterns
   on the moving disk surface and bits in the device’s buffer (Figure 7.1).
   
    A moving-head disk must also be able to cause the disk arm to move radially in and out
   across the disk’s surface
   7.2 I/O MODULES
   The computer consists of an I/O (input- output) system. This system includes two basic
   components(which not only connects an I/O device with the system bus, but plays a very crucial
   role in between) :
   
   i-
   ii-
   the I/O devices and
   
   I/O module,.
   
   A device which is connected to an I/O module of computer is called a peripheral device. The
   input/output module (I/O module) is normally connected to the computer system on one end and
   one or more input/output devices on the other.
   *** An I/O module is needed because of :

Diversity of I/O devices makes it difficult to include all the peripheral device logic
into CPU.

2.
3.
The I/O devices are usually slower than the memory and CPU. Therefore, it is not
advisable to use them on high speed system bus directly for communication purpose.
The data format and word length used by the peripheral may be quite different than
that of a CPU.

Functions of I/O Module: The major functions of an I/O module are:

Processor communication -- this involves the following tasks:
 Command decoding: The I/O module accepts commands from the processor,
typically sent as signals on the control bus. For example, an I/O module for a disk
drive might accept the following commands: READ SECTOR, WRITE SECTOR,
SEEK track number, and SCAN record ID. The latter two commands each include a
parameter that is sent on the data bus.

 Data: Data are exchanged between the processor and the I/O module over the data
bus.

 Status reporting: Because peripherals are so slow, it is important to know the status
of the I/O module. For example, if an I/O module is asked to send data to the
processor (read), it may not be ready to do so because it is still working on the
previous I/O command. This fact can be reported with a status signal .Common
status signals are BUSY and READY. There may also be signals to report various
error conditions.

 Address recognition: Just as each word of memory has an address, so does each I/O
device. Thus, an I/O module must recognize one unique address for each peripheral
it controls
device communication :On the other side,the I/O module must be able to perform device
communication. This communication involves commands, status information, and data (
An essential task of an I/O module is data buffering. Data coming from main memory are
sent to an I/O module in a rapid burst. The data are buffered in the I/O module and then
sent to the peripheral device at its data rate. In the opposite direction, data are buffered so
as not to tie up the memory in a slow transfer operation. Thus, the I/O module must be
able to operate at both device and memory speeds. Similarly, if the I/O device operates at a
rate higher than the memory access rate, then the I/O module performs the needed
buffering operation
Finally, an I/O module is often responsible for error detection and for subsequently
reporting errors to the processor. A simple example is the use of a parity bit on each
character of data. For example, the IRA character code occupies 7 bits of a byte. The
eighth bit is set so that the total number of 1s in the byte is even (even parity) or odd (odd
parity). When a byte is received, the I/O module checks the parity to determine whether an
error has occurred
7.2.1 I/O module structure
Figure 7.2 provides a general block diagram of an I/O module.

 The module connects to the rest of the computer through a set of signal lines (e.g., system bus
lines).

 Data transferred to and from the module are buffered in one or more data registers.

 There may also be one or more status registers that provide current status information. A
status register may also function as a control register, to accept detailed control information
from the processor.

 The logic within the module interacts with the processor via a set of control lines.
 The processor uses the control lines to issue commands to the I/O module. The module must
also be able to recognize and generate addresses associated with the devices it controls. Each
I/O module has a unique address or, if it controls more than one external device, a unique set
of addresses.

 Finally, the I/O module contains logic specific to the interface with each device that it
controls.
An I/O module that takes on most of the detailed processing burden, presenting a high-level
interface to the processor, is usually referred to as an I/O channel or I/O processor. An I/O
module that is quite primitive and requires detailed control is usually referred to as an I/O
controller or device controller. I/O controllers are commonly seen on microcomputers, whereas
I/O channels are used on mainframe
Figure 7.2 Block Diagram of an I/O Module
7.3 Programmed I/O

With programmed I/O, data are exchanged between the processor and the I/O module.
When the processor is executing a program and encounters an instruction relating to I/O, it
executes that instruction by issuing a command to the appropriate I/O module. With programmed
I/O, the I/O module will perform the requested action and then set the appropriate bits in the I/O
status register .The I/O module takes no further action to alert the processor. In particular, it does
not interrupt the processor. Thus, it is the responsibility of the processor to periodically check the
status of the I/O module until it finds that the operation is complete.
To explain the programmed I/O technique, we view it first from the point of view of the I/O
commands issued by the processor to the I/O module, and then from the point of view of the I/O
instructions executed by the processor. I/O COMMANDS To execute an I/O-related instruction, the processor issues an address, specifying the
particular I/O module and external device, and an I/O command. There are four types of I/O
commands that an I/O module may receive when it is addressed by a processor:

• Control: Used to activate a peripheral and tell it what to do.

• Test: Used to test various status conditions associated with an I/O module and its peripherals.
• Read: Causes the I/O module to obtain an item of data from the peripheral and place it in an
internal buffer
• Write: Causes the I/O module to take an item of data (byte or word) from the data bus and
subsequently transmit that data item to the peripheral
Figure 7.3a gives an example of the use of programmed I/O to read in a block of data from a
peripheral device into memory. For each word that is read in, the processor must remain in a
status-checking cycle until it determines that the word is available in the I/O module’s data
register. I/O INSTRUCTIONS With programmed I/O, there is a close correspondence between the I/O-related instructions that
the processor fetches from memory and the I/O commands that the processor issues to an I/O
module to execute the instructions. That is, the instructions are easily mapped into I/O
commands, and there is often a simple one-to-one relationship. The form of the instruction
depends on the way in which external devices are addressed. MEMORY- MAPPED I/O AND ISOLATED I/O When the processor, main memory, and I/O share a common bus, two modes of addressing are
possible: memory mapped and isolated.

With memory-mapped I/O, there is a single address space for memory locations and I/O
devices. The processor treats the status and data registers of I/O modules as memory
locations and uses the same machine instructions to access both memory and I/O devices.
So, for example, with 10 address lines, a combined total of 210=1024 memory locations
and I/O addresses can be supported, in any combination
isolated I/O:Again, with 10 address lines, the system may now support both 1024 memory
locations and 1024 I/O addresses. Because the address space for I/O is isolated from that
for memory, this is referred to as isolated I/O
memory-mapped
I/O
isolated I/O
7.4 Memory-Mapped and Isolated I/O
7.4 Interrupt-Driven I/O

The problem with programmed I/O is that the processor has to wait a long time for the I/O
module of concern to be ready for either reception or transmission of data. The processor, while
waiting, must repeatedly interrogate the status of the I/O module. As a result, the performance of
the entire system is severely degraded.
first from the point of view of the I/O module. For input,

the I/O module receives a READ command from the processor.

The I/O module then proceeds to read data in from an associated peripheral.

Once the data are in the module’s data register, the module signals an interrupt to the
processor over a control line.
The module then waits until its data are requested by the processor.

When the request is made, the module places its data on the data bus and is then ready for
another I/O operation.
From the processor’s point of view, the action for input is as follows.

The processor issues a READ command. It then goes off and does something else (e.g., the
processor may be working on several different programs at the same time).

At the end of each instruction cycle, the processor checks for interrupts.

When the interrupt from the I/O module occurs, the processor saves the context (e.g., program
counter and processor registers) of the current program and processes the interrupt.
In this case, the processor reads the word of data from the I/O module and stores it in
memory.

It then restores the context of the program it was working on (or some other program) and
resumes execution. Figure 7.3b shows the use of interrupt I/O for reading in a block of data. INTERRUPT PROCESSING Let us consider the role of the processor in interrupt-driven I/O in more detail. The occurrence
of an interrupt triggers a number of events, both in the processor hardware and in software.
Figure 7.5 shows a typical sequence. When an I/O device completes an I/O operation, the
following sequence of hardware events occurs:
The device issues an interrupt signal to the processor.

The processor finishes execution of the current instruction before responding to the interrupt
The processor tests for an interrupt, and sends an acknowledgment signal to the device that
issued the interrupt.

The processor now needs to prepare to transfer control to the interrupt routine. To begin, it
needs to save information needed to resume the current program at the point of interrupt. The
minimum information required is (a) the status of the processor, which is contained in a
register called the program status word (PSW); and (b) the location of the next instruction to
be executed,

processor now loads the program counter with the entry location of the interrupt-handling
program that will respond to this interrupt.

Typically, the interrupt handler will begin by saving the contents of all registers on the stack.
Figure 7.6a shows a simple example. In this case, a user program is interrupted after the
instruction at location N. The contents of all of the registers plus the address of the next
instruction are pushed onto the stack.
The interrupt handler next processes the interrupt.

When interrupt processing is complete, the saved register values are retrieved from the stack
and restored to the registers (e.g., see Figure 7.6b).
Finally , restore the PSW and program counter values from the stack. As a result, the next
instruction to be executed
Figure 7.5
Figure 7.6 Changes in Memory and Registers for
an Interrup
7.5 Direct Memory Access
When large volumes of data are to be moved, a more efficient technique is required: direct
memory access (DMA).

DMA involves an additional module on the system bus. The DMA module (Figure 8.12) is
capable of mimicking the processor and, indeed, of taking over control of the system from the
processor. It needs to do this to transfer data to and from memory over the system bus. For this
purpose, the DMA module must use the bus only when the processor does not need it, or it must
force the processor to suspend operation temporarily. The latter technique is more common and is
referred to as cycle stealing, because the DMA module in effect steals a bus cycle
Figure 7.7 Typical DMA Block
Diagram
When the processor wishes to read or write a block of data, it issues a command to the DMA
module, by sending to the DMA module the following information:

Whether a read or write is requested, using the read or write control line between the
processor and the DMA module.
The address of the I/O device involved, communicated on the data lines.
The starting location in memory to read from or write to, communicated on the data lines
and stored by the DMA module in its address register.
The number of words to be read or written, again communicated via the data lines and
stored in the data count register
Figure 7.8 shows where in the instruction cycle the processor may be suspended. In each case, the
processor is suspended just before it needs to use the bus. The DMA module then transfers one
word and returns control to the processor. Note that this is not an interrupt; the processor does not
save a context and do something else. Rather, the processor pauses for one bus cycle. The overall
effect is to cause the processor to execute more slowly. Nevertheless, for a multiple-word I/O
transfer, DMA is far more efficient than interrupt-driven or programmed I/O