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Chapter 9: Main Memory Operating System Concepts - 10th Edition Silberschatz, Galvin and Gagne (C)2018, revised by S. Weiss 2020 Chapter 9: Memory Management ?the instructions to loading the base and limit registers are privileged Operating System Concepts - 10th Edition 9.7 Silberschatz, Galvin and Gagne (C)2018, revised by S. Weiss 2020 Address Binding ?Example: The Intel 32 and 64-bit Architectures Operating System Concepts - 10th Edition 9.2 Silberschatz, Galvin and Gagne (C)2018, revised by S. Weiss 2020 Objectives ?We can provide this protection by using a pair of base and limit registers define the logical address space of a process Operating System Concepts - 10th Edition 9.6 Silberschatz, Galvin and Gagne (C)2018, revised by S. Weiss 2020 Hardware Address Protection ?To discuss various memory-management techniques, Operating System Concepts - 10th Edition 9.3 Silberschatz, Galvin and Gagne (C)2018, revised by S. Weiss 2020 The Model ?Protection of memory required to ensure correct operation Operating System Concepts - 10th Edition 9.5 Silberschatz, Galvin and Gagne (C)2018, revised by S. Weiss 2020 Protection ?Operating System Concepts - 10th Edition 9.4 Silberschatz, Galvin and Gagne (C)2018, revised by S. Weiss 2020 Background ?Programs on disk, ready to be brought into memory to execute form an input queue ?CPU must check every memory access generated in user mode to be sure it is between base and limit for that user ?Compiled code addresses bind to relocatable addresses ?A running process generates a stream of memory references : ?machine code fetches instructions, data, and stores data, so we can view it as a memory reference generator.Executable programs are loaded into memory from disk ?Cache sits between main memory and CPU registers ?Addresses represented in different ways at different stages of a program's life ?Contiguous Memory Allocation ?To understand how memory is managed at both the hardware level and the operating system level ?Main memory and registers are the only storage CPU can access directly ?addresses + read requests, or ?Register access is done in one CPU clock (or less) ?Main memory can take many cycles, causing a stall ?Need to censure that a process can access only access those addresses in its address space.Inconvenient to have first user process physical address always at 0000 ?Source code addresses usually symbolic ?Paging ?Swapping ?We use this abstraction to understand how memory is managed.Memory unit only sees a stream of: ?address + data and write requests ?Background ?Structure of the Page Table ???Without support, must be loaded into address 0000 ?How can it not be??

Chapter 9: Main Memory
Operating System Concepts – 10th Edition
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Chapter 9: Memory Management
 Background
 Contiguous Memory Allocation
 Paging
 Structure of the Page Table
 Swapping
 Example: The Intel 32 and 64-bit Architectures
Operating System Concepts – 10th Edition
9.2
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Objectives
 To understand how memory is managed at both the
hardware level and the operating system level
 To discuss various memory-management techniques,
Operating System Concepts – 10th Edition
9.3
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
The Model
 A running process generates a stream of memory references :
 machine code fetches instructions, data, and stores data,
so we can view it as a memory reference generator.
 We use this abstraction to understand how memory is
managed.
Operating System Concepts – 10th Edition
9.4
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Background
 Executable programs are loaded into memory from disk
 Main memory and registers are the only storage CPU can
access directly
 Memory unit only sees a stream of:
 addresses + read requests, or
 address + data and write requests
 Register access is done in one CPU clock (or less)
 Main memory can take many cycles, causing a stall
 Cache sits between main memory and CPU registers
 Protection of memory required to ensure correct operation
Operating System Concepts – 10th Edition
9.5
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Protection
 Need to censure that a process can access only access those
addresses in its address space.
 We can provide this protection by using a pair of base and limit
registers define the logical address space of a process
Operating System Concepts – 10th Edition
9.6
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Hardware Address Protection
 CPU must check every memory access generated in user
mode to be sure it is between base and limit for that user
 the instructions to loading the base and limit registers are
privileged
Operating System Concepts – 10th Edition
9.7
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Address Binding
 Programs on disk, ready to be brought into memory to execute form an
input queue
 Without support, must be loaded into address 0000
 Inconvenient to have first user process physical address always at
0000
 How can it not be?
 Addresses represented in different ways at different stages of a
program’s life
 Source code addresses usually symbolic
 Compiled code addresses bind to relocatable addresses
 i.e. “14 bytes from beginning of this module”
 Linker or loader will bind relocatable addresses to absolute
addresses
 i.e. 74014
 Each binding maps one address space to another
Operating System Concepts – 10th Edition
9.8
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Binding of Instructions and Data to Memory
 Address binding of instructions and data to memory addresses
can happen at three different stages
 Compile time: If memory location known a priori, absolute
code can be generated; must recompile code if starting
location changes
 Load time: Must generate relocatable code if memory
location is not known at compile time
 Execution time: Binding delayed until run time if the process
can be moved during its execution from one memory segment
to another
 Need hardware support for address maps (e.g., base and
limit registers)
Operating System Concepts – 10th Edition
9.9
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Multistep Processing of a User Program
Operating System Concepts – 10th Edition
9.10
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Logical vs. Physical Address Space
 The concept of a logical address space that is bound to a
separate physical address space is central to proper memory
management
 Logical address – generated by the CPU; also referred to
as virtual address
 Physical address – address seen by the memory unit
 Logical and physical addresses are the same in compile-time
and load-time address-binding schemes; logical (virtual) and
physical addresses differ in execution-time address-binding
scheme
 Logical address space is the set of all logical addresses
generated by a program
 Physical address space is the set of all physical addresses
generated by a program
Operating System Concepts – 10th Edition
9.11
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Memory-Management Unit (MMU)
 Hardware device that at run time maps virtual to physical
address
 Many methods possible, covered in the rest of this chapter
Operating System Concepts – 10th Edition
9.12
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Memory-Management Unit (Cont.)
 Consider simple scheme. which is a generalization of the
base-register scheme.
 The base register now called relocation register
 The value in the relocation register is added to every address
generated by a user process at the time it is sent to memory
 The user program deals with logical addresses; it never sees
the real physical addresses
 Execution-time binding occurs when reference is made to
location in memory
 Logical address bound to physical addresses
Operating System Concepts – 10th Edition
9.13
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Memory-Management Unit (Cont.)
 Consider simple scheme. which is a generalization of the
base-register scheme.
 The base register now called relocation register
 The value in the relocation register is added to every address
generated by a user process at the time it is sent to memory
Operating System Concepts – 10th Edition
9.14
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Dynamic Loading
 The entire program does need to be in memory to excute
 Routine is not loaded until it is called
 Better memory-space utilization; unused routine is never
loaded
 All routines kept on disk in relocatable load format
 Useful when large amounts of code are needed to handle
infrequently occurring cases
 No special support from the operating system is required
 Implemented through program design
 OS can help by providing libraries to implement
dynamic loading
Operating System Concepts – 10th Edition
9.15
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Dynamic Linking
 Static linking – system libraries and program code combined by
the loader into the binary program image
 Dynamic linking –linking postponed until execution time
 Small piece of code, stub, used to locate the appropriate
memory-resident library routine
 Stub replaces itself with the address of the routine, and executes
the routine
 Operating system checks if routine is in processes’ memory
address
 If not in address space, add to address space
 Dynamic linking is particularly useful for libraries
 System also known as shared libraries
 Consider applicability to patching system libraries
 Versioning may be needed
Operating System Concepts – 10th Edition
9.16
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Contiguous Allocation
 Main memory must support both OS and user processes
 Limited resource, must allocate efficiently
 Contiguous allocation is one early method
 Main memory usually into two partitions:
 Resident operating system, usually held in low memory
with interrupt vector
 User processes then held in high memory
 Each process contained in single contiguous section of
memory
Operating System Concepts – 10th Edition
9.17
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Contiguous Allocation (Cont.)
 Relocation registers used to protect user processes from each
other, and from changing operating-system code and data
 Base register contains value of smallest physical address
 Limit register contains range of logical addresses – each
logical address must be less than the limit register
 MMU maps logical address dynamically
 Can then allow actions such as kernel code being
transient and kernel changing size
Operating System Concepts – 10th Edition
9.18
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Hardware Support for Relocation and Limit Registers
Operating System Concepts – 10th Edition
9.19
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Variable Partition
 Multiple-partition allocation
 Degree of multiprogramming limited by number of partitions
 Variable-partition sizes for efficiency (sized to a given process’ needs)
 Hole – block of available memory; holes of various size are scattered
throughout memory
 When a process arrives, it is allocated memory from a hole large enough to
accommodate it
 Process exiting frees its partition, adjacent free partitions combined
 Operating system maintains information about:
a) allocated partitions b) free partitions (hole)
Operating System Concepts – 10th Edition
9.20
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Dynamic Storage-Allocation Problem
How to satisfy a request of size n from a list of free holes?
 First-fit: Allocate the first hole that is big enough
 Best-fit: Allocate the smallest hole that is big enough;
must search entire list, unless ordered by size

 Produces the smallest leftover hole
 Worst-fit: Allocate the largest hole; must also search
entire list

 Produces the largest leftover hole
First-fit and best-fit better than worst-fit in terms of speed and
storage utilization
Operating System Concepts – 10th Edition
9.21
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Fragmentation
 External Fragmentation – total memory space exists to
satisfy a request, but it is not contiguous
 Internal Fragmentation – allocated memory may be slightly
larger than requested memory; this size difference is memory
internal to a partition, but not being used
 First fit analysis reveals that given N blocks allocated, 0.5 N
blocks lost to fragmentation
 1/3 may be unusable -> 50-percent rule
Operating System Concepts – 10th Edition
9.22
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Fragmentation (Cont.)
 Reduce external fragmentation by compaction
 Shuffle memory contents to place all free memory
together in one large block
 Compaction is possible only if relocation is dynamic,
and is done at execution time
 I/O problem
 Latch job in memory while it is involved in I/O
 Do I/O only into OS buffers
 Now consider that backing store has same fragmentation
problems
Operating System Concepts – 10th Edition
9.23
Silberschatz, Galvin and Gagne ©2018, revised by S. Weiss 2020
Paging
 Physical address space of a process can be noncontiguous;
process is allocated physical memory whenever the latter is
available
 Avoids external fragmentation
 Avoids problem of varying sized memory chunks
 Divide physical memory into fixed-sized blocks called frames
 Size is power of 2, between 512 bytes and 16 Mbytes
 Divide logical memory into blocks of same size called pages
 Keep track of all free frames
 To run a program of size N pages, need to find N free frames and
load program
 Set up a page table to translate logical to physical addresses
 Backing store likewise split into pages
 Still have Internal fragmentation